The semiconductor industry continues to develop new, low dielectric constant (k) materials to improve microprocessor performance. Introducing porosity to dielectric materials can be used to decrease the k of the materials.
FIG. 1 is a conceptual diagram illustrating the effect of increasing porosity on properties of dielectric materials. While increasing porosity may lower the dielectric constant, other properties of dielectric materials such as, for example, stiffness, fracture resistance, and interfacial adhesion, can be negatively impacted.
Modern semiconductor manufacturing processes can also damage the porous dielectric materials at different stages of the integration process during, for example, hardmask deposition, reactive ion etch, photoresist strip, liner deposition, chemical mechanical polishing, or cap deposition. The highly accessible surface area of the porous dielectric materials may increase sensitivity to plasma processing steps.